General Information about SUN Sparc Central Processing Units.

Sun's Current CPU families.

Sun Currently produces the UltraSparc II, UltraSparc IIi , UltraSparc IIe and UltraSparc III CPU's.

Common UltraSPARC Features

• 64 bit RISC architecture
• Superscalar/Superpipelined high-performance microarchitecture.
• VIS multimedia accelerating instructions
• 100% binary compatibility with all previous version of SPARC systems.

UltraSPARC II

The UltraSPARC II processor is the second generation in the UltraSPARC s-series processor family. The UltraSPARC II processor is designed to provide up to 4-way glueless multiprocessing support and scales up to 64-way systems. The processor supporst multiple L2 cache speeds and sized to enable high performance multiprocessing systems.

Features

• Built-in Multi-Processor Support (upto 64 way)
• 250 MHz to 480 MHz
• L2 Cache support: 256KB-16MB

UltraSPARC IIi

The Ultra SPARC IIi processor is designed to deliver the proven system performance and features of the Ultra SPARC processor in a single chip system solution. The UltraSPARC IIi incorporates a CPU, memory controller and PCI bus interface to give the highest system performance at a low system implementation cost.
By integrating the complex PCI bus interface and the memory controller within the UltraSPARC IIi many of the traditional bottlenecks like memory latency, low I/O throughputs have been improved.
Furthermore, the integration of these systems onto the chip also reduces costs as it eases system development, and allows designers to use PC-class, PCI-based mother boards and components.

Features

• upto 333MHz
• Integrated Rev 2.1 PCI compliant and JTAG support
• Cache coherent PCI DMA

UltraSPARC IIe

The UltraSPARC IIe is designed with the embedded systems market in mind. It incorporates the proven 64-bit UltraSPARC architecture with the basic embedded requirements of small size, low power consumption and low system cost.
The UltraSPARC IIe is manufactured in a cost effective 0.18 micron 6-LM process, this processor includes the memory controller, PCI controller and Level-2 cache in addition the CPU eliminating the need for an external "Northbridge" chip.

Features

• Support for Multiple OS including a market-leading Solaris Operating System and Wind River's VxWorks RTOS
• 0.18 micron 6-LM process
• Built in memory controller
• Built in PCI controller
• 6.7 Watts at 400 MHz
• 10 Watts at 500 MHz
• Software controllable speed - Drops to 1/2 or 1/6 speed depending on loads

UltraSPARC III

Following in the footsteps of the UltraSPARC I and UltraSPARC II the UltraSPARC III blows away the competition. It can scale upto 1024 CPU per system!!!! The UltraSPARC III architecture is built for both performance and reliability by including L2 cache error correction, parity memory protection and automatic error recovery.

Features

• Scalable to 1,024 CPUs per system
• 600, 750, and 900MHz Initial Offerings
• Above 1.5GHz by End of Design Lifecycle
• Sparc Architecture Backwards Compatibility
• System Distributed Network Scalable to thousands of Systems
• SDRAM Memory Controller Embedded Into CPU Core
• Up to 4 Interleaved Memory Banks per CPU
• Up to 8GB of Local System Memory
• 2.4GB/sec CPU-to-Memory Bandwidth
• 150MHz Base Clock Frequency
• 4.8GB/sec Memory-to-Bus Bandwidth
• Distributed Bus Arbitration
• Wide Data Crossbar Switches for Improved Bandwidth
• UPA64S Graphics Interface

The Next Generation

MAJC

The Microprocessor Architecture for Java Computing (MAJC, pronounced magic) is the next generation of Microprocessors from Sun. Although the name implies that it is a Java implementation, it is just a marketing ploy. The MAJC Chips are designed with High Bandwidth applications in mind. It will include many new features and technologies such as .07-micron manufacturing, over 400 million transistors and hardware level Multi-threading. The Hardware level threading is really interesting as it removes a lot of the resource intensive tasks that are currently assigned to Operating Systems, resulting in phenomenal performance increases. The MAJC development team claims the CPU will offer enough power to render the computer-animated movie "Toy Story" in real time, with just one chip.